power on self lest
A power-on
self-test (POST) is a process performed by firmware or software routines immediately after a
computer or other digital electronic device is powered on.
This
article mainly deals with personal computers, but many other embedded systems such as those in
major appliances, avionics,
communications, or medical equipment also have self-test routines which are
automatically invoked at power-on.
The
results of the POST may be displayed on a panel that is part of the device,
output to an external device, or stored for future retrieval by a diagnostic
tool. Since a self-test might detect that the system's usual human-readable
display is non-functional, an indicator lamp or a speaker may be provided to show error
codes as a sequence of flashes or beeps. In addition to running tests, the
POST process may also set the initial state of the device from firmware.
In
the case of a computer, the POST routines are part of a device's pre-boot
sequence; if they complete successfully, the bootstrap loadercode is invoked to load
an operating system.
Contents
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IBM-compatible
PC POST[edit]
In IBM PC compatible computers, the main
duties of POST are handled by the BIOS,
which may hand some of these duties to other programs designed to initialize
very specific peripheral devices,
notably for video and SCSI initialization.
These other duty-specific programs are generally known collectively as option ROMs or individually as
the video BIOS, SCSI BIOS, etc.
The
principal duties of the main BIOS during POST are as follows:
·
verify
CPU registers
·
verify
the integrity of the BIOS code itself
·
verify
some basic components like DMA, timer, interrupt controller
·
find,
size, and verify system main memory
·
initialize
BIOS
·
pass
control to other specialized extension BIOSes (if installed)
·
identify,
organize, and select which devices are available for booting
The
functions above are served by the POST in all BIOS versions back to the very
first. In later BIOS versions, POST will also:
·
discover,
initialize, and catalog all system buses and devices
·
provide
a user interface for
system's configuration
·
construct
whatever system environment is required by the target operating system
(In
early BIOSes, POST did not organize or select boot devices, it simply
identified floppy or hard disks, which the system would try to boot in that
order, always.)
The
BIOS begins its POST when the CPU is reset. The
first memory location the CPU tries to execute is known as the reset vector. In the case of a hard reboot, the northbridge will
direct this code fetch (request) to the BIOS located on the system flash memory. For a warm boot, the BIOS will be located in the
proper place in RAM and
the northbridge will direct the reset vector call to the RAM. (In earlier PC
systems, before chipsets were standard, the BIOS ROM would be located at an
address range that included the reset vector, and BIOS ran directly out of ROM.
This is why the motherboard BIOS ROM is in segment F000 in the conventional memory map.)
During
the POST flow of a contemporary BIOS, one of the first things a BIOS should do
is determine the reason it is executing. For a cold boot, for example, it may
need to execute all of its functionality. If, however, the system supports
power saving or quick boot methods, the BIOS may be able to circumvent the
standard POST device discovery, and simply program the devices from a preloaded
system device table.
The
POST flow for the PC has developed from a very simple, straightforward process
to one that is complex and convoluted. During the POST, the BIOS must integrate
a plethora of competing, evolving, and even mutually exclusive standards and
initiatives for the matrix of hardware and OSes the PC is expected to support,
although at most only simple memory tests and the setup screen are displayed.
In
earlier BIOSes, up to around the turn of the millennium, the POST would perform
a thorough test of all devices, including a complete memory test. This design
by IBM was modeled after their larger (e.g. mainframe) systems, which would
perform a complete hardware test as part of their cold-start process. As the PC
platform evolved into more of a commodity consumer device, the mainframe- and
minicomputer-inspired high-reliability features such as parity memory and the
thorough memory test in every POST were dropped from most models. The
exponential growth of PC memory sizes, driven by the equally exponential drop
in memory prices, was also a factor in this, as the duration of a memory test
using a given CPU is directly proportional to the memory size.
The original IBM PC
could be equipped with as little as 16 KiB of RAM and typically had between 64
and 640 KiB; depending on the amount of equipped memory, the computer's
4.77 MHz 8088 required between five seconds and 1.5 minutes to complete
the POST and there was no way to skip it. Beginning with the IBM XT, a memory
count was displayed during POST instead of a blank screen.[1] A modern PC with a bus rate
of around 1 GHz and a 32-bit bus might be 2000x or even 5000x faster, but
it might have more than 3 GB of memory—5000x more. With people being more
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